The jz4740 now probes the interrupt controller using DT, so remove the now dead non-DT init code. Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx> Cc: Lars-Peter Clausen <lars@xxxxxxxxxx> --- arch/mips/include/asm/mach-jz4740/irq.h | 2 -- arch/mips/jz4740/irq.c | 25 +++++++------------------ 2 files changed, 7 insertions(+), 20 deletions(-) diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h index 5ce4302..df50736 100644 --- a/arch/mips/include/asm/mach-jz4740/irq.h +++ b/arch/mips/include/asm/mach-jz4740/irq.h @@ -54,6 +54,4 @@ #define NR_IRQS (JZ4740_IRQ_ADC_BASE + 6) -extern void __init jz4740_intc_init(void); - #endif diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index a4f0a82..9a8bda3 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -77,10 +77,16 @@ static struct irqaction jz4740_cascade_action = { .name = "JZ4740 cascade interrupt", }; -static void __init __jz4740_intc_init(int parent_irq) +static int __init jz4740_intc_of_init(struct device_node *node, + struct device_node *parent) { struct irq_chip_generic *gc; struct irq_chip_type *ct; + int parent_irq; + + parent_irq = irq_of_parse_and_map(node, 0); + if (!parent_irq) + return -EINVAL; jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); @@ -105,23 +111,6 @@ static void __init __jz4740_intc_init(int parent_irq) irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); setup_irq(parent_irq, &jz4740_cascade_action); -} - -void __init jz4740_intc_init(void) -{ - __jz4740_intc_init(2); -} - -static int __init jz4740_intc_of_init(struct device_node *node, - struct device_node *parent) -{ - int parent_irq; - - parent_irq = irq_of_parse_and_map(node, 0); - if (!parent_irq) - return -EINVAL; - - __jz4740_intc_init(parent_irq); return 0; } IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", jz4740_intc_of_init); -- 2.2.1