From: David Daney <david.daney@xxxxxxxxxx> Some hardware blocks attached to the OCTEON bootbus run asynchronously to accesses from the CPUs. These include MMC/SD host, CF(when using DMA), and NAND controller. A bus error, or corrupt data may occur if a CPU is trying to access a bootbus connected device at the same time the bus is running asynchronous operations. To work around these problems we add this semaphore that must be acquired before initiating bootbus activity. Subsequent patches will add users for this. Signed-off-by: David Daney <david.daney@xxxxxxxxxx> [aleksey.makarov@xxxxxxxxxx: combine the patches] Signed-off-by: Aleksey Makarov <aleksey.makarov@xxxxxxxxxx> Signed-off-by: Chandrakala Chavva <cchavva@xxxxxxxxxxxxxxxxxx> --- arch/mips/cavium-octeon/setup.c | 3 +++ arch/mips/include/asm/octeon/octeon.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 94f888d..7311338 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -50,6 +50,9 @@ extern void pci_console_init(const char *arg); static unsigned long long MAX_MEMORY = 512ull << 20; +DEFINE_SEMAPHORE(octeon_bootbus_sem); +EXPORT_SYMBOL(octeon_bootbus_sem); + struct octeon_boot_descriptor *octeon_boot_desc_ptr; struct cvmx_bootinfo *octeon_bootinfo; diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index d781f9e..8e4e4db 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -252,4 +252,6 @@ void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t); extern void octeon_fixup_irqs(void); +extern struct semaphore octeon_bootbus_sem; + #endif /* __ASM_OCTEON_OCTEON_H */ -- 2.1.3
