On 12/18/2014 10:09, Markos Chandras wrote:
> MIPS R6 removed the BEQL instruction so do not try to emulate it
> if the R2-to-R6 emulator is not present.
How does this affect code for the old ISAs, MIPS-II to MIPS-IV? I.e., the SGIs
and the R10K CPUs that have to worry about the R10000_LLSC_WAR workaround and
use branch-likely insns?
--J
> Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx>
> ---
> arch/mips/kernel/branch.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
> index 5f2a168c37fd..539d059ba4fb 100644
> --- a/arch/mips/kernel/branch.c
> +++ b/arch/mips/kernel/branch.c
> @@ -572,6 +572,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
> */
> case beq_op:
> case beql_op:
> + if (NO_R6EMU && insn.i_format.opcode == beql_op) {
> + ret = -SIGILL;
> + break;
> + }
> if (regs->regs[insn.i_format.rs] ==
> regs->regs[insn.i_format.rt]) {
> epc = epc + 4 + (insn.i_format.simmediate << 2);
>
