On 12/18/2014 07:09 AM, Markos Chandras wrote:
sub $reg, imm is not a real MIPS instruction. The assembler replaces
that with 'addi $reg, -imm'.
That is a bug right there. We cannot have faulting instructions like
this in the kernel.
However, addi has been removed from R6,
so we replace the 'sub' instruction with 'addiu' instead.
Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx>
---
arch/mips/include/asm/spinlock.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index f63b3543c1a4..c82fc0eefbec 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -277,7 +277,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
do {
__asm__ __volatile__(
"1: ll %1, 0(%2)# arch_read_unlock \n"
- " sub %1, 1 \n"
+ " addiu %1, -1 \n"
Instead, how about fixing the real bug by s/sub/subu/.
Would that work for R6 too? If so, just do that.
" sc %1, 0(%2) \n"
: "+m" (rw->lock), "=&r" (tmp)
: "r" (&rw->lock)
