The fpucondbit struct will be used later on by the MIPS R2 instruction
emulator, so in order to access it, we need to move it to a header.
Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx>
---
arch/mips/include/asm/fpu_emulator.h | 12 ++++++++++++
arch/mips/math-emu/cp1emu.c | 12 ------------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index 3ee347713307..d7670bd80855 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -30,6 +30,18 @@
#include <asm/local.h>
#include <asm/processor.h>
+/* convert condition code register number to csr bit */
+static const unsigned int fpucondbit[8] = {
+ FPU_CSR_COND0,
+ FPU_CSR_COND1,
+ FPU_CSR_COND2,
+ FPU_CSR_COND3,
+ FPU_CSR_COND4,
+ FPU_CSR_COND5,
+ FPU_CSR_COND6,
+ FPU_CSR_COND7
+};
+
#ifdef CONFIG_DEBUG_FS
struct mips_fpu_emulator_stats {
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index a426c176ee54..0aabdfc90d19 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -67,18 +67,6 @@ static int fpux_emu(struct pt_regs *,
/* Determine rounding mode from the RM bits of the FCSR */
#define modeindex(v) ((v) & FPU_CSR_RM)
-/* convert condition code register number to csr bit */
-static const unsigned int fpucondbit[8] = {
- FPU_CSR_COND0,
- FPU_CSR_COND1,
- FPU_CSR_COND2,
- FPU_CSR_COND3,
- FPU_CSR_COND4,
- FPU_CSR_COND5,
- FPU_CSR_COND6,
- FPU_CSR_COND7
-};
-
/* (microMIPS) Convert certain microMIPS instructions to MIPS32 format. */
static const int sd_format[] = {16, 17, 0, 0, 0, 0, 0, 0};
static const int sdps_format[] = {16, 17, 22, 0, 0, 0, 0, 0};
--
2.2.0
