MIPS R6 uses the <R6 LWC2 opcode for the new BC instruction. Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx> --- arch/mips/kernel/branch.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c index ca102557fa3c..d9e3a0d72a64 100644 --- a/arch/mips/kernel/branch.c +++ b/arch/mips/kernel/branch.c @@ -784,6 +784,11 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, regs->cp0_epc = epc; break; #endif +#ifdef CONFIG_CPU_MIPSR6 + case lwc2_or_bc_op: + regs->cp0_epc += 8; + break; +#endif } return ret; -- 2.2.0
