From: David Daney <david.daney@xxxxxxxxxx>
Current delay slot handling does eXecute Out of Line (XOL) on the
stack, which prevents a non-executable stack. Use the instruction
emulator instead.
Tested by booting 32-bit Debian on OCTEON. More than 1700
instructions emulated to login to command line.
Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
---
arch/mips/math-emu/cp1emu.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index cac529a..787de7a 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -694,11 +694,12 @@ do { \
* Emulate the single floating point instruction pointed at by EPC.
* Two instructions if the instruction is in a branch delay slot.
*/
-
+int mips_insn_emul(struct pt_regs *regs, mips_instruction ir, void *__user *fault_addr);
static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
struct mm_decoded_insn dec_insn, void *__user *fault_addr)
{
unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc;
+ unsigned long origpc = xcp->cp0_epc;
unsigned int cond, cbit;
mips_instruction ir;
int likely, pc_inc;
@@ -1038,7 +1039,15 @@ emul:
* Single step the non-cp1
* instruction in the dslot
*/
- return mips_dsemul(xcp, ir, contpc);
+ sig = mips_insn_emul(xcp, ir, fault_addr);
+ if (sig == 0) {
+ xcp->cp0_epc = contpc;
+ MIPS_FPU_EMU_INC_STATS(insn_emul);
+ } else {
+ xcp->cp0_epc = origpc;
+ pr_err("mips_insn_emul: %08x ->%d\n", (unsigned)ir, sig);
+ }
+ return sig;
} else if (likely) { /* branch not taken */
/*
* branch likely nullifies
--
1.7.11.7
