On Tue, Nov 04, 2014 at 02:18:48PM +0800, Huacai Chen wrote: > diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c > index c94c4e9..01d676a 100644 > --- a/arch/mips/kernel/smp.c > +++ b/arch/mips/kernel/smp.c > @@ -136,7 +136,8 @@ asmlinkage void start_secondary(void) > calibrate_delay(); > preempt_disable(); > cpu = smp_processor_id(); > - cpu_data[cpu].udelay_val = loops_per_jiffy; > + if (!cpu_data[cpu].udelay_val) > + cpu_data[cpu].udelay_val = loops_per_jiffy; Why this? Is the idea that the value of loops_per_jiffy which was set on bootup may no longer match the actual clock frequency? Ralf
