On Tue, Nov 04, 2014 at 02:13:25PM +0800, Huacai Chen wrote: > Loongson-3 maintains cache coherency by hardware. So we introduce a cpu > feature named cpu_has_coherent_cache and use it to modify MIPS's cache > flushing functions. You've modified all the local_* functions which means the r4k_on_each_cpu() in r4k___flush_cache_all(), r4k_flush_cache_sigtramp() otc. will still be executed. Your change is correct - but I think it can be optimized if we can assume that all CPUs have a coherent cache by moving the check into the caller. smp_call_function() can be fairly expensive in particular on big systems! Ralf
