On 10/10/2014 19:01, Andrew Bresticker wrote: > Hi John, > > On Fri, Oct 10, 2014 at 2:34 AM, John Crispin <blogic@xxxxxxxxxxx> > wrote: >> The mt7621 has a GIC. rather than handle both irq coree in one >> file we add a secondary irq-gic.c. > > Why not use the current GIC driver that I've been fixing up? I > believe Ralf will be applying the first set of clean-ups soon and > I'm planning on doing additional clean-up and adding device-tree > support. I have a work-in-progress branch here if you're > interested: https://github.com/abrestic/linux/tree/mips-gic-dt-wip Hi, yep, already stumbled across those patches. i will send an updated version start of the week. thanks for the link. I will ping you if i have questions. John > >> diff --git a/arch/mips/ralink/irq-gic.c >> b/arch/mips/ralink/irq-gic.c new file mode 100644 index >> 0000000..0ae7ea0 --- /dev/null +++ b/arch/mips/ralink/irq-gic.c > >> +static int __init +of_gic_init(struct device_node *node, + >> struct device_node *parent) > >> + if (of_address_to_resource(node, 2, &gcmp)) + >> panic("Failed to get gic memory range"); + if >> (request_mem_region(gcmp.start, resource_size(&gcmp), + >> gcmp.name) < 0) + panic("Failed to request gcmp >> memory"); > > Ah, so this SoC has a CM2 as well. Is it at the address reported > by C0_CMGCRBase? If so, then mips_cm_probe() will be able to find > it and set it up. Otherwise, device-tree based probing should > probably be added to the mips-cm driver. > >
