The {save,restore}_fp_context{,32} functions require that the assembler
allows the use of sdc instructions on any FP register, and this is
acomplished by setting the arch to r4000. However this has the effect
of enabling the assembler to use mips64 instructions in the expansion
of pseudo-instructions. This was done in the (now-reverted) commit
eec43a224cf1 "MIPS: Save/restore MSA context around signals" which
led to my mistakenly believing that there was an assembler bug, when
in reality the assembler was just emitting mips64 instructions. Avoid
the issue for future commits which will add code to r4k_fpu.S by
pushing the .set arch=r4000 directives into the functions that require
it, and remove the spurious assertion declaring the assembler bug.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
---
arch/mips/include/asm/asmmacro.h | 12 ++++--------
arch/mips/kernel/r4k_fpu.S | 13 ++++++++++++-
2 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index cd9a98b..f6293ef 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -312,8 +312,7 @@
.set noat
.insn
.word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
- /* move triggers an assembler bug... */
- or \rd, $1, zero
+ move \rd, $1
.set pop
.endm
@@ -322,16 +321,14 @@
.set noat
.insn
.word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
- /* move triggers an assembler bug... */
- or \rd, $1, zero
+ move \rd, $1
.set pop
.endm
.macro insert_w wd, n, rs
.set push
.set noat
- /* move triggers an assembler bug... */
- or $1, \rs, zero
+ move $1, \rs
.word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
.set pop
.endm
@@ -339,8 +336,7 @@
.macro insert_d wd, n, rs
.set push
.set noat
- /* move triggers an assembler bug... */
- or $1, \rs, zero
+ move $1, \rs
.word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
.set pop
.endm
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 8352523..787d3db 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -30,9 +30,10 @@
.endm
.set noreorder
- .set arch=r4000
LEAF(_save_fp_context)
+ .set push
+ .set arch=r4000
cfc1 t1, fcr31
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
@@ -84,11 +85,14 @@ LEAF(_save_fp_context)
EX sw t1, SC_FPC_CSR(a0)
jr ra
li v0, 0 # success
+ .set pop
END(_save_fp_context)
#ifdef CONFIG_MIPS32_COMPAT
/* Save 32-bit process floating point context */
LEAF(_save_fp_context32)
+ .set push
+ .set arch=r4000
cfc1 t1, fcr31
mfc0 t0, CP0_STATUS
@@ -137,6 +141,7 @@ LEAF(_save_fp_context32)
jr ra
li v0, 0 # success
+ .set pop
END(_save_fp_context32)
#endif
@@ -146,6 +151,8 @@ LEAF(_save_fp_context32)
* - cp1 status/control register
*/
LEAF(_restore_fp_context)
+ .set push
+ .set arch=r4000
EX lw t1, SC_FPC_CSR(a0)
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
@@ -194,10 +201,13 @@ LEAF(_restore_fp_context)
ctc1 t1, fcr31
jr ra
li v0, 0 # success
+ .set pop
END(_restore_fp_context)
#ifdef CONFIG_MIPS32_COMPAT
LEAF(_restore_fp_context32)
+ .set push
+ .set arch=r4000
/* Restore an o32 sigcontext. */
EX lw t1, SC32_FPC_CSR(a0)
@@ -242,6 +252,7 @@ LEAF(_restore_fp_context32)
ctc1 t1, fcr31
jr ra
li v0, 0 # success
+ .set pop
END(_restore_fp_context32)
#endif
--
2.0.4
