Move cvmx_fuse_read_byte() into a .c file.
Signed-off-by: Aaro Koskinen <aaro.koskinen@xxxxxxx>
---
arch/mips/cavium-octeon/executive/octeon-model.c | 20 ++++++++++++++++++++
arch/mips/include/asm/octeon/cvmx.h | 20 +-------------------
2 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/arch/mips/cavium-octeon/executive/octeon-model.c b/arch/mips/cavium-octeon/executive/octeon-model.c
index f4c1b36..e187872 100644
--- a/arch/mips/cavium-octeon/executive/octeon-model.c
+++ b/arch/mips/cavium-octeon/executive/octeon-model.c
@@ -28,6 +28,26 @@
#include <asm/octeon/octeon.h>
/**
+ * Read a byte of fuse data
+ * @byte_addr: address to read
+ *
+ * Returns fuse value: 0 or 1
+ */
+uint8_t cvmx_fuse_read_byte(int byte_addr)
+{
+ union cvmx_mio_fus_rcmd read_cmd;
+
+ read_cmd.u64 = 0;
+ read_cmd.s.addr = byte_addr;
+ read_cmd.s.pend = 1;
+ cvmx_write_csr(CVMX_MIO_FUS_RCMD, read_cmd.u64);
+ while ((read_cmd.u64 = cvmx_read_csr(CVMX_MIO_FUS_RCMD))
+ && read_cmd.s.pend)
+ ;
+ return read_cmd.s.dat;
+}
+
+/**
* Given the chip processor ID from COP0, this function returns a
* string representing the chip model number. The string is of the
* form CNXXXXpX.X-FREQ-SUFFIX.
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index f991e77..6852dfa 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -451,25 +451,7 @@ static inline uint32_t cvmx_octeon_num_cores(void)
return cvmx_pop(ciu_fuse);
}
-/**
- * Read a byte of fuse data
- * @byte_addr: address to read
- *
- * Returns fuse value: 0 or 1
- */
-static uint8_t cvmx_fuse_read_byte(int byte_addr)
-{
- union cvmx_mio_fus_rcmd read_cmd;
-
- read_cmd.u64 = 0;
- read_cmd.s.addr = byte_addr;
- read_cmd.s.pend = 1;
- cvmx_write_csr(CVMX_MIO_FUS_RCMD, read_cmd.u64);
- while ((read_cmd.u64 = cvmx_read_csr(CVMX_MIO_FUS_RCMD))
- && read_cmd.s.pend)
- ;
- return read_cmd.s.dat;
-}
+uint8_t cvmx_fuse_read_byte(int byte_addr);
/**
* Read a single fuse bit
--
2.1.0
