This series is attempt to cleanup some tiny issues, found during studying the MIPS PCI code. The first four patches remove the odd locking in the functions, which are read and write the PCI device configuration registers. Ggeneric PCI code already do proper locking so no need to add another one. Local PCI read/write functions are never called simultaneously, also they do not require synchronization with the PCI controller ops, since they are used before the controller registration. Lantiq also uses lock in config_read/config_write functions, but seems that there are some reasons to do that, since the same lock used in other places (e.g. flash driver, GPIO driver). So I left them as is. The fifth patch makes PCI_DMA_BUS_IS_PHYS constant. There are no supported machine with a IOMMU unit, so there are no reasons to keep run-time detection support. Sergey Ryazanov (5): MIPS: NILE4: remove odd locking in PCI config space access code MIPS: MSP71xx: remove odd locking in PCI config space access code MIPS: pci-ar7{1x,24}x: remove odd locking in PCI config space access code MIPS: pci-rt3883: remove odd locking in PCI config space access code MIPS: make PCI_DMA_BUS_IS_PHYS=1 constant arch/mips/include/asm/pci.h | 10 ++++------ arch/mips/kernel/setup.c | 7 ------- arch/mips/pci/ops-nile4.c | 12 +----------- arch/mips/pci/ops-pmcmsp.c | 12 ------------ arch/mips/pci/pci-ar71xx.c | 13 ------------- arch/mips/pci/pci-ar724x.c | 23 ----------------------- arch/mips/pci/pci-ip32.c | 1 - arch/mips/pci/pci-rt3883.c | 9 --------- arch/mips/pci/pci.c | 3 --- arch/mips/pnx833x/common/setup.c | 3 --- 10 files changed, 5 insertions(+), 88 deletions(-) -- 1.8.1.5