Hi, Aurelien, I have a quick look, both MIPS and SH use IPI to implement flush_dcache_page(). It seems Kent's email has changed, so CC his new address. :) Huacai On Thu, Jul 31, 2014 at 12:01 AM, Aurelien Jarno <aurelien@xxxxxxxxxxx> wrote: > Hi Hucai, > > On Wed, Jul 30, 2014 at 04:35:26PM +0800, Huacai Chen wrote: >> Hi, Aurelien, >> >> After some days debugging, we found the root cause: If we revert the >> commit 21b40200cfe961 (aio: use flush_dcache_page()), everything is >> OK. This commit add two flush_dcache_page() in irq disabled context, >> but in MIPS, flush_dcache_page() is implemented via call_function IPI. >> Unfortunately, call_function IPI shouldn't be called in irq disabled >> context, otherwise there will be deadlock. > > Thanks a lot for digging into the problem. I will try to revert this > patch to confirm it fixes the problem for us, and I'll keep you updated. > >> I don't know how to solve this problem, since commit 21b40200 >> shouldn't be reverted (Loongson can revert it because of >> hardware-maintained cache, but other MIPS need this). May be the >> original author (Kent Overstreet) have good ideas? > > Maybe we should look if it's possible to reduce the window where > interrupts are disabled in this function, but I guess we'll have to wait > for Kent about that. Do we know if other MIPS systems or other > architectures also implement the flush_dcache_page() function via IPI? > > Thanks, > Aurelien > > -- > Aurelien Jarno GPG: 4096R/1DDD8C9B > aurelien@xxxxxxxxxxx http://www.aurel32.net >
