The commit 08a07904e182895e1205f399465a3d622c0115b8 (v3.16-rc1) entitled "MIPS: math-emu: Remove most ifdefery": switched from build time to runtime detection for the CPU ISA level. However, along the way, a typo was introduced in the code path to return the value to the register file. Previously, the MIPSInst_FD macro was used but the above commit switched to MIPSInst_RT leading to regressions. Link: http://www.linux-mips.org/archives/linux-mips/2014-07/msg00484.html Reported-by: Rob Kendrick <rob.kendrick@xxxxxxxxxxxxxxx> Reviewed-by: Paul Burton <paul.burton@xxxxxxxxxx> Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx> Signed-off-by: Rob Kendrick <rob.kendrick@xxxxxxxxxxxxxxx> --- arch/mips/math-emu/cp1emu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 736c17a..bf0fc6b 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -1827,7 +1827,7 @@ dcopuop: case -1: if (cpu_has_mips_4_5_r) - cbit = fpucondbit[MIPSInst_RT(ir) >> 2]; + cbit = fpucondbit[MIPSInst_FD(ir) >> 2]; else cbit = FPU_CSR_COND; if (rv.w) -- 1.7.10.4
