Re: [PATCH v2 5/6] mips: use per-mm page to execute FP branch delay slots

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On Fri, Jul 04, 2014 at 11:38:09AM +0200, Ralf Baechle wrote:
> On Fri, Jul 04, 2014 at 10:06:01AM +0100, Paul Burton wrote:
> 
> > > The actual piece of code that needs to be installed is tiny.  So the page
> > > could be shared between many threads.  In fact a single page would
> > > suffice for most processes and only threads would require more slots
> > > than provided by a single page so more pags could be allocated or the
> > > process could sleep until a slot becomes available.
> > 
> > You just roughly described the v2 patch that we're replying to :)
> 
> Can't be that wrong then :-)
> 
> I seem to only have replies to that patch in my mail folder not the
> patch itself.

You can find it in patchwork if you're interested:

  http://patchwork.linux-mips.org/patch/6125/

> > > I'm also wondering how insane emulation would be.  We already have the
> > > capability to emulate a fair fraction of the instruction set.
> > 
> > Yeah, and I'm reasonably sure we're going to need some more once MIPSr6
> > is supported. I guess (perhaps only for the short term?) it could be
> > done in stages - if systems include ASEs or cop2 that the emulation
> > didn't implement then it could fall back to the current emuframe code.
> 
> And it's dependence on executable stackframe ...

...yup.

> > I'm in 2 minds about this - it sounds crazy but perhaps it's the most
> > sane option available :)
> 
> Sanity is overrated anyway ;-)

I had originally left this patch at the point I started considering
implementing emulation for the whole ISA in the kernel, figuring I was
going insane & should probably do something else for a while. Perhaps I
shouldn't worry so much ;)

Thanks,
    Paul


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