Code in a switch statement in probe_pcache checks the CPU type twice unnecessarily for processor implementations that have the alias removal feature reported by the CP0 Config7.AR and Config7.IAR bits. This change rewrites the affected fragment avoiding the extraneous check and improving readability. Signed-off-by: Maciej W. Rozycki <macro@xxxxxxxxxxxxxx> --- Since nobody bothered to earn credit for integrating the proposal I posted earlier on: http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=alpine.LFD.2.10.1403222210230.21669%40eddie.linux-mips.org I decided to take the credit myself. Ralf, please apply. Maciej linux-mips-c-r4k-1074k-cleanup.patch Index: linux-20140623-4maxp64/arch/mips/mm/c-r4k.c =================================================================== --- linux-20140623-4maxp64.orig/arch/mips/mm/c-r4k.c +++ linux-20140623-4maxp64/arch/mips/mm/c-r4k.c @@ -1230,19 +1230,19 @@ static void probe_pcache(void) case CPU_R14000: break; + case CPU_74K: + case CPU_1074K: + alias_74k_erratum(c); + /* Fall through. */ case CPU_M14KC: case CPU_M14KEC: case CPU_24K: case CPU_34K: - case CPU_74K: case CPU_1004K: - case CPU_1074K: case CPU_INTERAPTIV: case CPU_P5600: case CPU_PROAPTIV: case CPU_M5150: - if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) - alias_74k_erratum(c); if (!(read_c0_config7() & MIPS_CONF7_IAR) && (c->icache.waysize > PAGE_SIZE)) c->icache.flags |= MIPS_CACHE_ALIASES;
