Fix some errors introduced by commit e2efc0ab3a ("MIPS: math-emu:
Remove most ifdefery."), which result in incorrect behaviour of the
FPU emulator.
Signed-off-by: Alex Smith <alex.smith@xxxxxxxxxx>
---
Ralf, the above commit in mips-for-linux-next causes a regression
which this patch fixes (the regression I was seeing is fixed by the
last change, but I also noticed a couple of incorrect ISA level
checks which I fixed up as well). Could you squash this into that
commit?
---
arch/mips/math-emu/cp1emu.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 331334c..08e6a74 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1512,7 +1512,7 @@ copcsr:
goto copcsr;
case fcvtl_op:
- if (!cpu_has_mips_3_4_5 && cpu_has_mips64)
+ if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
return SIGILL;
SPFROMREG(fs, MIPSInst_FS(ir));
@@ -1524,7 +1524,7 @@ copcsr:
case ftruncl_op:
case fceill_op:
case ffloorl_op:
- if (!cpu_has_mips_3_4_5 && cpu_has_mips64)
+ if (!cpu_has_mips_3_4_5 && !cpu_has_mips64)
return SIGILL;
oldrm = ieee754_csr.rm;
@@ -1808,11 +1808,10 @@ dcopuop:
cbit = fpucondbit[MIPSInst_RT(ir) >> 2];
else
cbit = FPU_CSR_COND;
- cond = ctx->fcr31 & cbit;
if (rv.w)
- ctx->fcr31 |= cond;
+ ctx->fcr31 |= cbit;
else
- ctx->fcr31 &= ~cond;
+ ctx->fcr31 &= ~cbit;
break;
case d_fmt:
--
1.9.3
