Re: [PATCH 2/2] MIPS: fix DECStation build for L1_CACHE_SHIFT value

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On Tue, 21 Jan 2014, Florian Fainelli wrote:

> When support for the DECStation is enabled, it will default to use a
> MIPS R3000 class processor. This will cause an intentional build failure
> to popup because MIPS_L1_CACHE_SHIFT and cpu_dcache_line_size()
> disagree. Fix this by selecting MIPS_L1_CACHE_SHIFT_2 when we build
> targetting a MIPS R3000 CPU to fix that build failure and satisfy all
> requirements.
> 
> Signed-off-by: Florian Fainelli <florian@xxxxxxxxxxx>

Acked-by: Maciej W. Rozycki <macro@xxxxxxxxxxxxxx>

 This actually boots -- Ralf, please apply.

  Maciej


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