In cores which implement the MT ASE, the CPUNum in the EBase register is
a concatenation of the core number & the VPE ID within that core. In
order to retrieve the correct core number CPUNum must be shifted
appropriately to remove the VPE ID bits.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
---
Changes in v2:
- Use the new core_vpes() function to fix a build error for UP kernels
where smp_num_siblings is not declared.
---
arch/mips/kernel/cpu-probe.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 34df5af..8133d8f 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -23,6 +23,7 @@
#include <asm/cpu-type.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
+#include <asm/mipsmtregs.h>
#include <asm/msa.h>
#include <asm/watch.h>
#include <asm/elf.h>
@@ -421,8 +422,11 @@ static void decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
#ifndef CONFIG_MIPS_CPS
- if (cpu_has_mips_r2)
+ if (cpu_has_mips_r2) {
c->core = read_c0_ebase() & 0x3ff;
+ if (cpu_has_mipsmt)
+ c->core >>= fls(core_nvpes()) - 1;
+ }
#endif
}
--
1.8.5.3
