In 32-bit machine, the start address of flushing icache is wrong after
calculated address of 2nd modified instruction in function tracer. The
start address is shifted 4 bytes from ordinary calculation.
This causes problem when the address of 1st instruction is the last
word of one cache line. It will not be flushed at this case.
Signed-off-by: Viller Hsiao <villerhsiao@xxxxxxxxx>
---
arch/mips/kernel/ftrace.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index 185ba25..5bdc535 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -107,12 +107,12 @@ static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1,
unsigned int new_code2)
{
int faulted;
+ unsigned long ip2 = ip + 4;
safe_store_code(new_code1, ip, faulted);
if (unlikely(faulted))
return -EFAULT;
- ip += 4;
- safe_store_code(new_code2, ip, faulted);
+ safe_store_code(new_code2, ip2, faulted);
if (unlikely(faulted))
return -EFAULT;
flush_icache_range(ip, ip + 8); /* original ip + 12 */
--
1.8.4.3
