On Fri, Dec 27, 2013 at 02:13:16PM -0500, John David Anglin wrote: > On 27-Dec-13, at 1:00 PM, Matthew Wilcox wrote: > > >+#ifdef __ARCH_FORCE_SHMLBA > >+ /* Is the mapping cache-coherent? */ > >+ if ((pgoff ^ linear_page_index(vma, start)) & > >+ ((SHMLBA-1) >> PAGE_SHIFT)) > >+ goto out; > >+#endif > > > I think this will cause problems on PA-RISC. The reason is we have > an additional offset > for mappings. See get_offset() in sys_parisc.c. I don't think it will cause any additional problems. The test merely asks "Is the offset to put at this address cache-coherent with the offset that was at this address when the mmap was established?" > SHMLBA is 4 MB on PA-RISC. If we limit ourselves to aligned > mappings, we run out of > memory very quickly. Even with our current implementation, we fail > the perl locales test > with locales-all installed. I know the large SHMLBA is problematic for PA-RISC, but I don't think there's a lot of code out there using remap_file_pages(). code.google.com found almost nothing, and a regular google search found only a couple of little toys. Have you considered measuring SHMLBA on different CPU models and reducing it at boot time? I know that 4MB is the architectural guarantee (actually, I seem to remember that 16MB was the architectural guarantee, but jsm found some CPU architects who said it would enver exceed 4MB). I bet some CPUs have considerably lower cache coherency limits.
