> I'm debugging a problem with a SOLO6110-based H.264 PCI video encoder on > Atheros AR7100-based (MIPS, big-endian) platform. BTW this CPU obviously has VIPT data cache, this means a physical page with multiple virtual addresses (e.g. mapped multiple times) may and will be cached multiple times. AR7100 = arch/mips/ath79. -- Krzysztof Halasa Research Institute for Automation and Measurements PIAP Al. Jerozolimskie 202, 02-486 Warsaw, Poland
