The BCM47xx SoCs have a 8250 serial compatible console at address
0x18000300 and an other at 0x18000400. On most devices 0x18000300 is
wired to some pins on the board, we should use that.
This is the smae for the AI (bcma) and the SB (ssb) bus, this is some
offset on the chip common core.
Signed-off-by: Hauke Mehrtens <hauke@xxxxxxxxxx>
---
arch/mips/Kconfig | 2 ++
arch/mips/bcm47xx/prom.c | 9 +++++++++
2 files changed, 11 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f73cb81..02a3a66 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -117,6 +117,8 @@ config BCM47XX
select NO_EXCEPT_FILL
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_HAS_EARLY_PRINTK
+ select EARLY_PRINTK_8250 if EARLY_PRINTK
help
Support for BCM47XX based boards
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index 99c3ce2..0af808d 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -28,6 +28,8 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
+#include <linux/ssb/ssb_driver_chipcommon.h>
+#include <linux/ssb/ssb_regs.h>
#include <linux/smp.h>
#include <asm/bootinfo.h>
#include <bcm47xx.h>
@@ -94,9 +96,16 @@ static __init void prom_init_mem(void)
add_memory_region(0, mem, BOOT_MEM_RAM);
}
+/*
+ * This is the first serial on the chip common core, it is at this position
+ * for sb (ssb) and ai (bcma) bus.
+ */
+#define BCM47XX_SERIAL_ADDR (SSB_ENUM_BASE + SSB_CHIPCO_UART0_DATA)
+
void __init prom_init(void)
{
prom_init_mem();
+ setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
}
void __init prom_free_prom_memory(void)
--
1.7.10.4
