On Thu, 27 Jun 2013, Ralf Baechle wrote: > > This patch adds explicit support for 16-bit instruction breakpoints > > for floating point exceptions. > > This patch has gone stale with a conflict in traps.c. Can you resubmit > an updated patch? Thanks! Also I reckon we used to have an instruction fetch helper here -- where has it gone? Without it code gets horribly cluttered. I'd envisage one that returns both the full instruction word and an ISA specifier, one of MIPS, MIPS16 or microMIPS, an enum preferably so that `switch' handles it without hassle. The instruction word would have the second half-word already retrieved if applicable, with the endianness already adjusted, i.e. the major-opcode half-word always in the high word. With such a helper in place you could reduce the decoding of the instruction and retrieval of the break code to a simple switch statement, immediately obvious to a casual reader. This might result in a small performance loss here, but this is not a critical execution path and I think the reduction of the long-term maintenance cost of this code outweighs any such loss. Finally, in the FP emulator I think the comment needs updating to match reality (as a separate change). Also I think struct emuframe should use unions for instruction accesses to avoid the horrible casts. Maciej
