On Wednesday 19 June 2013, David Daney wrote: > From: David Daney <david.daney@xxxxxxxxxx> > > A few differences needed by OCTEON: > > o These are DWC UARTS, but have USR at a different offset. > > o Internal SoC buses require reading back from registers to maintain > write ordering. > > o 8250 on OCTEON appears with 64-bit wide registers, so when using > readb/writeb in big endian mode we have to adjust the membase to hit > the proper part of the register. > > o No UCV register, so we hard code some properties. > > Because OCTEON doesn't have a UCV register, I change where > dw8250_setup_port(), which reads the UCV, is called by pushing it in > to the OF and ACPI probe functions, and move unchanged > dw8250_setup_port() earlier in the file. > > Signed-off-by: David Daney <david.daney@xxxxxxxxxx> > Acked-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> > Cc: Arnd Bergmann <arnd@xxxxxxxx> > Cc: Heikki Krogerus <heikki.krogerus@xxxxxxxxxxxxxxx> Acked-by: Arnd Bergmann <arnd@xxxxxxxx>
