Le lundi 03 juin 2013 16:39:32, Jonas Gorski a écrit : > Most newer BCM63XX SoCs after BCM6358 use a BMIPS4350 CPU with SMP > support. This patchset allows BCM6368 and BCM6362 to boot a SMP kernel > (both tested, as well as (not yet upstreamed) BCM63268). > > BCM6328 is skipped because the only SMP versions will be rejected by > current code (they are BCM6329, which is treated as a totally > unsupported chip). > > BCM6358 is intentionally skipped because it shares a single TLB for > both cores/threads, which requires implementing locking for TLB accesses, > and ain't nobody got time for that. > > The internal interrupt controller supports routing IRQs to both CPUs, > and support will be added in a later patchset. For now all hardware > interrupts will go to CPU0. > > Totally unscientific OpenSSL benchmarking shows a nice ~90% speed > increase when enabling the second core. > > No idea about the FIXME in 1/3, never had a problem with it so I left it > in place as to have it documented. I successfully tested these on BCM6361 (6362-like) on top of the current mips- for-linux-next, feel free to add my: Tested-by: Florian Fainelli <florian@xxxxxxxxxxx> Thanks Jonas! -- Florian
