From: Kevin Cernekee <cernekee@xxxxxxxxx>
MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
on BMIPS SMP. Make the board support code aware of them.
Signed-off-by: Kevin Cernekee <cernekee@xxxxxxxxx>
[jogo@xxxxxxxxxxx: move sw irqs behind timer irq]
Signed-off-by: Jonas Gorski <jogo@xxxxxxxxxxx>
---
arch/mips/bcm63xx/irq.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index c0ab388..d744606 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -294,6 +294,10 @@ asmlinkage void plat_irq_dispatch(void)
if (cause & CAUSEF_IP7)
do_IRQ(7);
+ if (cause & CAUSEF_IP0)
+ do_IRQ(0);
+ if (cause & CAUSEF_IP1)
+ do_IRQ(1);
if (cause & CAUSEF_IP2)
dispatch_internal();
if (!is_ext_irq_cascaded) {
--
1.7.10.4
