On Thu, May 2, 2013 at 7:58 AM, Ralf Baechle <ralf@xxxxxxxxxxxxxx> wrote:
>
> For a while we just used to live with the race condition resulting from
> not disabling interrupts in the idle loop. Then c65a5480 fixed this by
> checking if we're returning to the WAIT instruction in the idle loop
> when returning from an interrupt and iff so, rolling back the
> program counter to point to the if (test_thread_flag(TIF_NEED_RESCHED))
> test at the beginning of rollback_r4k_wait.
Umm. That sounds buggy. What if there was an interrupt *between* the
two places, not right at the wait instruction?
It seriously sounds like MIPS should do this by enabling interrupts in
the *assembly* code immediately preceding the wait instruction. IOW,
you'd effectively have the same kind of "sti; halt" kind of sequence
that x86 has. Not "enable interrupts" + C compiler puts random
instructions here + "wait".
Linus
