On Wed, Feb 06, 2013 at 05:05:10PM +0100, folkert wrote: > Is this mailing list also meant for generic mips questions? (if not: any > suggestions for one that is?) > > If so: I'mm experimenting a bit with mips, specifically on SGI hardware > (Indigo). Now it seems all mips systems have the prom at 0xbfc00000. But > how does it start? The first 0x3c0 bytes seem to be nonsense. Somewhere > on the web I found that 0xbfc00884 is the starting point but after > single stepping 5 instructions, the program counter jumps to 0x00000000 > so I don't think that's the right one either. Also, reading the first 4 > bytes from bfc00000 and using that as a pointer seems to be invalid too: > 0bf000f0. > Anyone with insights regarding the booting of the prom on sgi systems? All MIPS processors start execution at 0xbfc00000 after a hardware reset or NMI. 0xbfc00884 is not an address that has any specific meaning in the processor architecture itself. I think it's being used in the GXemul documentation just for sake of an example. If your disassembler defaults to like MIPS I / R3000 it won't disassemble all instructions for the MIPS III R4000 processor. I'd expect some cache initialization code right at 0xbfc00000 and that could would be affected. Ralf
