2013.02.04. 13:13 keltezéssel, Sergei Shtylyov írta: > Hello. > > On 03-02-2013 16:31, Gabor Juhos wrote: > >>>> @@ -160,6 +163,16 @@ ath79_register_pci_ar724x(int id, >>>> res[2].start = irq; >>>> res[2].end = irq; >>>> >>>> + res[3].name = "mem_base"; >>>> + res[3].flags = IORESOURCE_MEM; >>>> + res[3].start = mem_base; >>>> + res[3].end = mem_base + mem_size - 1; >>>> + >>>> + res[4].name = "io_base"; >>>> + res[4].flags = IORESOURCE_IO; >>>> + res[4].start = io_base; >>>> + res[4].end = io_base; >>> >>> One I/O port, hm? What is it good for? > >> Strictly speaking it is not good for anything. This is a PCIe controller and it >> does not support IO requests at all. > > Is this the case with every PCIe controller or only this particular one? It is a limitation of this controller. > >> However the whole PCI code assumes that >> each PCI controller have an IO resource and uses the hose->io_resource pointer >> unconditionally. > >> Additionally, this matches with the removed static resource: > >>> -static struct resource ar724x_io_resource = { >>> - .name = "PCI IO space", >>> - .start = 0, >>> - .end = 0, >>> - .flags = IORESOURCE_IO, >>> -}; >>> - > > Since you seems to always pass 0, maybe you don't need 'io_base' parameter to > the function above? The AR724x SoCs SoCs have one PCIe controller only. However newer chips have more than one PCIe controllers, and each of those controllers needs a different io_base value to avoid resource conflicts. I'm preparing patches for newer SoCs and if everything goes well I will send those today. -GAbor