The base address of the PCI memory is 0x10000000 and the base address of the PCI configuration space is 0x17000000 on the AR71xx SoCs. The AR71XX_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that overlaps with the configuration space. The patch fixes the value of the AR71XX_PCI_MEM_SIZE constant, in order to avoid this resource conflicts. Signed-off-by: Gabor Juhos <juhosg@xxxxxxxxxxx> --- arch/mips/pci/pci-ar71xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c index 1552522..6eaa4f2 100644 --- a/arch/mips/pci/pci-ar71xx.c +++ b/arch/mips/pci/pci-ar71xx.c @@ -24,7 +24,7 @@ #include <asm/mach-ath79/pci.h> #define AR71XX_PCI_MEM_BASE 0x10000000 -#define AR71XX_PCI_MEM_SIZE 0x08000000 +#define AR71XX_PCI_MEM_SIZE 0x07000000 #define AR71XX_PCI_WIN0_OFFS 0x10000000 #define AR71XX_PCI_WIN1_OFFS 0x11000000 -- 1.7.10
