>> + if (cpu_has_mips_r2) {
>> + /* PTE ptr offset is obtained from BadVAddr */
>> + UASM_i_MFC0(p, tmp, C0_BADVADDR);
>> + UASM_i_LW(p, ptr, 0, ptr);
>> +#ifdef CONFIG_CPU_MIPS64
>
> Is this the right condition? Is is correct for a 32-bit kernel running
> on a 64-bit CPU? Will OCTEON be covered? (no, but it should)
>
You're right. The condition should be using CONFIG_64BIT instead. With regards to OCTEON, please test on your platforms and give me a patch.
> Can this whole thing be made more clear by defining UASM_i_EXT(...) that
> does the proper thing for either 32 or 64 bit kernels as the rest of the
> capitolized versions of the macros do?
>
Certainly.
> Is (PAGE_SHIFT - PTE_ORDER - PTE_T_LOG2 - 1) != (PGDIR_SHIFT -
> PAGE_SHIFT - 1) for any combinations of config options? Why are they
> different for the two cases?
>
I do not have 64-bit R2 hardware access. I plugged in the value that jchandra gave to me that worked for him. Other platform testers and their input would be appreciated and welcomed.
-Steve
