From: "Steven J. Hill" <sjhill@xxxxxxxx> If the CPU type is selected to be a MIPS32R2 core, we surround some code with #ifdef's to reduce the kernel binary size. Signed-off-by: Steven J. Hill <sjhill@xxxxxxxx> --- arch/mips/mm/tlbex.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index cd9ad1b..4c23656 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -364,6 +364,7 @@ static void __cpuinit build_restore_work_registers(u32 **p) */ extern unsigned long pgd_current[]; +# ifndef CONFIG_CPU_MIPS32_R2 /* * The R3000 TLB handler is simple. */ @@ -403,6 +404,7 @@ static void __cpuinit build_r3000_tlb_refill_handler(void) dump_handler((u32 *)ebase, 32); } +# endif /* !CONFIG_CPU_MIPS32_R2 */ #endif /* CONFIG_MIPS_PGD_C0_CONTEXT */ /* @@ -1672,7 +1674,7 @@ build_pte_modifiable(u32 **p, struct uasm_reloc **r, } } -#ifndef CONFIG_MIPS_PGD_C0_CONTEXT +#if !defined(CONFIG_MIPS_PGD_C0_CONTEXT) && !defined(CONFIG_CPU_MIPS32_R2) /* @@ -1826,7 +1828,7 @@ static void __cpuinit build_r3000_tlb_modify_handler(void) dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); } -#endif /* CONFIG_MIPS_PGD_C0_CONTEXT */ +#endif /* !CONFIG_MIPS_PGD_C0_CONTEXT && !CONFIG_CPU_MIPS32_R2 */ /* * R4000 style TLB load/store/modify handlers. @@ -2164,6 +2166,7 @@ void __cpuinit build_tlb_refill_handler(void) #endif switch (current_cpu_type()) { +#ifndef CONFIG_CPU_MIPS32_R2 case CPU_R2000: case CPU_R3000: case CPU_R3000A: @@ -2193,6 +2196,7 @@ void __cpuinit build_tlb_refill_handler(void) panic("No R8000 TLB refill handler yet"); break; +#endif /* !CONFIG_CPU_MIPS32_R2 */ default: if (!run_once) { scratch_reg = allocate_kscratch(); -- 1.7.9.5