Re: [PATCH] MIPS: ath79: fix CPU/DDR frequency calculation for SRIF PLLs

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Sat, Sep 08, 2012 at 02:02:21PM +0200, Gabor Juhos wrote:

Applied but I had to fix a conflict:

@@ -65,6 +65,8 @@
 #define AR934X_WMAC_SIZE	0x20000
 #define AR934X_EHCI_BASE	0x1b000000
 #define AR934X_EHCI_SIZE	0x200
+#define AR934X_SRIF_BASE	(AR71XX_APB_BASE + 0x00116000)
+#define AR934X_SRIF_SIZE	0x1000
 
 /*
  * DDR_CTRL block

The EHCI lines don't exist yet.  Seems harmless though.

  Ralf



[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux