On Thu, Jan 12, 2012 at 06:38:22PM +0300, Sergei Shtylyov wrote: > >@@ -374,6 +379,10 @@ static int __init mipsxx_init(void) > > save_perf_irq = perf_irq; > > perf_irq = mipsxx_perfcount_handler; > > > >+ if (cp0_perfcount_irq>= 0) > > BTW, I just noticed. IRQ0 is not a valid IRQ in Linux, > request_irq() should fail when passed 0, so this and following check > should be '> 0'. In a normal configuration that is in a discrete processor or in a MIPS core where the performance IRQ is just routed back into the core the lowest sensible value for cp0_perfcount_irq is 2, so there is no immediate problem there. IRQ 0 is ok for static use; dynamic use is problematic. This case is even more problematic because the interrupt might be shared with the timer and the timer interrupt is allocated statically (see cevt-r4k.c) but the performance counter interrupt later allocated dynamically with IRQF_SHARED. Ralf
