On 03/28/2011 08:06 AM, Thomas Gleixner wrote:
From: David Daney<ddaney@xxxxxxxxxxxxxxxxxx>
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney<ddaney@xxxxxxxxxxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Cc: ralf@xxxxxxxxxxxxxx
LKML-Reference:<1301081931-11240-5-git-send-email-ddaney@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Thomas Gleixner<tglx@xxxxxxxxxxxxx>
---
arch/mips/cavium-octeon/octeon-irq.c | 1410 ++++++++++++++-----------
arch/mips/cavium-octeon/setup.c | 12
arch/mips/cavium-octeon/smp.c | 39
arch/mips/include/asm/mach-cavium-octeon/irq.h | 243 +---
arch/mips/include/asm/octeon/octeon.h | 2
arch/mips/pci/msi-octeon.c | 20
6 files changed, 915 insertions(+), 811 deletions(-)
Well tglx modified my patch slightly, but it still works. So this one
is OK too.
David Daney
