On Mon, Feb 07, 2011 at 10:02:34AM +0100, Mikael Starvik wrote: > It is clearly stated in http://www.linux-mips.org/wiki/Highmem that the > MIPS kernel can´t user highmem on machines with cache aliasing and I > understand the reason. So, what is the solution here? Switch to 16k > pages? Or are there other ways to get more memory on a machine with cache > aliases? This is an implementation restriction. I did the original MIPS highmem work in early 2002 for a company which didn't want to be the first through the 64-bit minefield; I was using a Sibyte Swarm evaluation board back then and its SB1 cores happen not to have aliases so I was able to take a few short cuts. For many years after this virtually everybody was wise enough to go for 64-bit hardware and kernel for large memory systems so interest in removing this restriction only came up like last year. 16k pages are probably a good idea anyway; in most cases they provide a significant performance boost. Details depend on the exact workload. However I should mention that the combination of page sizes other than 4k with highmem also is untested afaics. The solution for the alias problem is the right mix of cacheflushes at the right places and a strategy to avoid aliases where possible - business as usual. ARM already supports highmem with aliases. Ralf
