On 01/06/11 23:56, Anoop P A wrote:
On Thu, 2011-01-06 at 15:31 -0800, Kevin D. Kissell wrote:
I'm sure I've said this before, and it's in various comments in the SMTC
code, but...
As an aside to this conversation, would it be possible to create a
Documentation/mips/SMTC.txt file that would actually propagate
upstream, so that I'd stop being the sole repository of SMTC folklore?
I only maintain it as a hobby.
Ok. Well thanks much for your detailed explanation. Well I hope I found
the root cause . smtc_clockevent_init() was overriding irq_hwmask even
if are using platform specific get_c0_compare_int. With following patch
everything seems to be working for me.
------------------------------------------------------------------------
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
index 2e72d30..a25fc59 100644
--- a/arch/mips/kernel/cevt-smtc.c
+++ b/arch/mips/kernel/cevt-smtc.c
@@ -310,9 +310,14 @@ int __cpuinit smtc_clockevent_init(void)
return 0;
/*
* And we need the hwmask associated with the c0_compare
- * vector to be initialized.
+ * vector to be initialized. However incase of platform
+ * specific get_co_compare_int, don't override irq_hwmask
+ * expect platform code to set a valid mask value.
*/
- irq_hwmask[irq] = (0x100<< cp0_compare_irq);
+
+ if (!get_c0_compare_int)
+ irq_hwmask[irq] = (0x100<< cp0_compare_irq);
+
if (cp0_timer_irq_installed)
return 0;
-----------------------------------------------------------------------
I'm still not clear on one point that, to me, is pretty important when
engineering a fix here. Are you, in fact, using the Count/Compare
interrupt system, but having the externalization of the compare
interrupt routed back through an intervening interrupt controller,
or is your timer coming from another source?
In the former case, I think you're on the right track as to the
possible cause of a problem, but the fix should actually be simpler
and rather more elegant. Why can't you simply see to it that
cp0_compare_irq is set to the right value, either at compile time,
or in your earliest platform initialization of the interrupt controller?
That would be a one-line, inline change and spare us another
cryptic conditional.
In the later case, you'll presumably be having lots of other problems,
as cevt-smtc.c is intertwined with cevt-r4k.c and the Count/Compare
paradigm.
Regards,
Kevin K.
