v2: Declare pgd_current for mipsr1 and mips32 builds. This other patch set: http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=1292889290-12849-1-git-send-email-ddaney%40caviumnetworks.com Should still be applied *after* this one. >From v1: The MIPS32r2 and MIPS64r2 specifications allow processors to have scratch registers in coprocessor 0. If these are present, we can use one of them to carry the current PGD and save three instructions in the TLB handlers. There are three patches: 1 - Probe for presence of scratch registers an print number found in /proc/cpuinfo. 2 - Add DINSM to uasm for use by patch 3. 3 - Convert the TLB handlers. This also involves dynamically generating tlbmiss_handler_setup_pgd, which used to be statically defined. David Daney (3): MIPS: Probe for presence of KScratch registers. MIPS: Add DINSM to uasm. MIPS: Use C0_KScratch (if present) to hold PGD pointer. arch/mips/include/asm/cpu-info.h | 1 + arch/mips/include/asm/mmu_context.h | 8 +-- arch/mips/include/asm/uasm.h | 1 + arch/mips/kernel/cpu-probe.c | 2 + arch/mips/kernel/proc.c | 2 + arch/mips/kernel/traps.c | 2 +- arch/mips/mm/tlbex.c | 116 ++++++++++++++++++++++++++++++++--- arch/mips/mm/uasm.c | 11 +++- 8 files changed, 124 insertions(+), 19 deletions(-) -- 1.7.2.3