Octeon has instructions that conditionally branch based on the value of any single bit in any register. We use these to reduce the number of instructions in the generated TLB handlers. This set applies on top of the recent KScratch patch set. David Daney (2): MIPS: Declare uasm bbit0 and bbit1 functions. MIPS: Use BBIT instructions in TLB handlers arch/mips/include/asm/uasm.h | 2 + arch/mips/mm/tlbex.c | 119 +++++++++++++++++++++++++++++++---------- 2 files changed, 92 insertions(+), 29 deletions(-) -- 1.7.2.3