The commit ea31a6b20371 ("MIPS: Honor L2 bypass bit") breaks
malta build as follows. Looks like not compile-tested :(
CC arch/mips/mm/sc-mips.o
arch/mips/mm/sc-mips.c: In function 'mips_sc_is_activated':
arch/mips/mm/sc-mips.c:77:7 error: 'config2' undeclared (first use in this function)
arch/mips/mm/sc-mips.c:77:7 note: each undeclared identifier is reported only once
arch/mips/mm/sc-mips.c:77:7 for each function it appears in
arch/mips/mm/sc-mips.c:81:2 error: 'tmp' undeclared (first use in this function)
arch/mips/mm/sc-mips.c:86:1 warning: control reaches end of non-void function
make[3]: *** [arch/mips/mm/sc-mips.o] Error 1
make[2]: *** [arch/mips/mm/sc-mips.o] Error 2
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
Signed-off-by: Namhyung Kim <namhyung@xxxxxxxxx>
---
arch/mips/mm/sc-mips.c | 9 +++++++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 505feca..a168f52 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -66,8 +66,11 @@ static struct bcache_ops mips_sc_ops = {
* 12..15 as implementation defined so below function will eventually have
* to be replaced by a platform specific probe.
*/
-static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
+static inline int mips_sc_is_activated(struct cpuinfo_mips *c,
+ unsigned int config2)
{
+ unsigned int tmp;
+
/* Check the bypass bit (L2B) */
switch (c->cputype) {
case CPU_34K:
@@ -83,6 +86,8 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
c->scache.linesz = 2 << tmp;
else
return 0;
+
+ return 1;
}
static inline int __init mips_sc_probe(void)
@@ -108,7 +113,7 @@ static inline int __init mips_sc_probe(void)
config2 = read_c0_config2();
- if (!mips_sc_is_activated(c))
+ if (!mips_sc_is_activated(c, config2))
return 0;
tmp = (config2 >> 8) & 0x0f;
--
1.7.0.4
