Re: [PATCH 03/14] MIPS: Octeon: Update L2 Cache code for CN63XX

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On Thu, Oct 07, 2010 at 04:03:42PM -0700, David Daney wrote:

> The CN63XX has a different L2 cache architecture.  Update the helper
> functions to reflect this.
> 
> Some joining of split lines was also done to improve readability, as
> well as reformatting of comments.

I fixed the trailing blank line the patch added to
arch/mips/cavium-octeon/executive/cvmx-l2c.c and queued it for 2.6.37.

Thanks!

  Ralf



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