Cavium Octeon CPUs have a 64-bit cycle counter that is synchronized
when the CPUs are brought on-line. So for this case we don't need any
fancy stuff.
Signed-off-by: David Daney <ddaney@xxxxxxxxxxxxxxxxxx>
---
arch/mips/Kconfig | 4 +-
arch/mips/include/asm/trace-clock.h | 39 ++++++++++++++++++++++++++++++++++-
arch/mips/kernel/smp.c | 2 +
3 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a690e9b..9e91e8c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1782,8 +1782,8 @@ config HAVE_GET_CYCLES_32
def_bool y
depends on !CPU_R4400_WORKAROUNDS
select HAVE_TRACE_CLOCK
- select HAVE_TRACE_CLOCK_32_TO_64
- select HAVE_UNSYNCHRONIZED_TSC
+ select HAVE_TRACE_CLOCK_32_TO_64 if (!CPU_CAVIUM_OCTEON)
+ select HAVE_UNSYNCHRONIZED_TSC if (!CPU_CAVIUM_OCTEON)
#
# Use the generic interrupt handling code in kernel/irq/:
diff --git a/arch/mips/include/asm/trace-clock.h b/arch/mips/include/asm/trace-clock.h
index 3d8cb0f..a052f42 100644
--- a/arch/mips/include/asm/trace-clock.h
+++ b/arch/mips/include/asm/trace-clock.h
@@ -12,6 +12,43 @@
#define TRACE_CLOCK_MIN_PROBE_DURATION 200
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+
+#include <asm/octeon/octeon.h>
+
+#define TC_HW_BITS 64
+
+static inline u32 trace_clock_read32(void)
+{
+ return (u32)read_c0_cvmcount(); /* only need the 32 LSB */
+}
+
+static inline u64 trace_clock_read64(void)
+{
+ return read_c0_cvmcount();
+}
+
+static inline u64 trace_clock_frequency(void)
+{
+ return octeon_get_clock_rate();
+}
+
+static inline u32 trace_clock_freq_scale(void)
+{
+ return 1;
+}
+
+static inline void get_trace_clock(void)
+{
+ return;
+}
+
+static inline void put_trace_clock(void)
+{
+ return;
+}
+
+#else /* !CONFIG_CPU_CAVIUM_OCTEON */
/*
* Number of hardware clock bits. The higher order bits are expected to be 0.
* If the hardware clock source has more than 32 bits, the bits higher than the
@@ -65,7 +102,7 @@ static inline void put_trace_clock(void)
{
put_synthetic_tsc();
}
-
+#endif /* CONFIG_CPU_CAVIUM_OCTEON */
static inline void set_trace_clock_is_sync(int state)
{
}
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index f8c50d1..42083eb 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -159,7 +159,9 @@ void __init smp_cpus_done(unsigned int max_cpus)
{
mp_ops->cpus_done();
synchronise_count_master();
+#ifdef CONFIG_HAVE_UNSYNCHRONIZED_TSC
test_tsc_synchronization();
+#endif
}
/* called from main before smp_init() */
--
1.6.6.1
