From: Hauke Mehrtens <hauke@xxxxxxxxxx> Ignoring the last page when ddr size is 128M. Cached accesses to last page is causing the processor to prefetch using address above 128M stepping out of the DDR address space. Signed-off-by: Hauke Mehrtens <hauke@xxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Patchwork: http://patchwork.linux-mips.org/patch/981/ Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx> arch/mips/bcm47xx/prom.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) --- http://git.linuxtv.org/v4l-dvb.git?a=commitdiff;h=84a6fcb368a080620d12fc4d79e07902dbee7335 diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c index c51405e..29d3cbf 100644 --- a/arch/mips/bcm47xx/prom.c +++ b/arch/mips/bcm47xx/prom.c @@ -141,6 +141,14 @@ static __init void prom_init_mem(void) break; } + /* Ignoring the last page when ddr size is 128M. Cached + * accesses to last page is causing the processor to prefetch + * using address above 128M stepping out of the ddr address + * space. + */ + if (mem == 0x8000000) + mem -= 0x1000; + add_memory_region(0, mem, BOOT_MEM_RAM); }
