On Thu, Jan 28, 2010 at 07:37:33PM +0300, Sergei Shtylyov wrote:
> Florian Fainelli wrote:
> >AR7 has a larger physical offset than other MIPS based
> >systems and therefore needs to setup its handlers beyond
> >the usual KSEG0 range. When running the kernel in mapped
> >mode this modification is also required. Remove function
> >comment which is now incorrect.
> >
> >Signed-off-by: David Daney <ddaney@xxxxxxxxxxxxxxxxxx>
> >Signed-off-by: Eugene Konev <ejka@xxxxxxxxxxxx>
> >Signed-off-by: Florian Fainelli <florian@xxxxxxxxxxx>
> >---
> >diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
> >index 574608e..14d515f 100644
> >--- a/arch/mips/kernel/traps.c
> >+++ b/arch/mips/kernel/traps.c
> ...]
> >@@ -1283,9 +1279,18 @@ void __init *set_except_vector(int n, void *addr)
> > exception_handlers[n] = handler;
> > if (n == 0 && cpu_has_divec) {
> >- *(u32 *)(ebase + 0x200) = 0x08000000 |
> >- (0x03ffffff & (handler >> 2));
> >- local_flush_icache_range(ebase + 0x200, ebase + 0x204);
> >+ unsigned long jump_mask = ~((1 << 28) - 1);
> >+ u32 *buf = (u32 *)(ebase + 0x200);
> >+ unsigned int k0 = 26;
> >+ if((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) {
>
> Missing space after *if* (should be easy for Ralf to fix manually
> though). You should run the patch thru scripts/checkpatch.pl first.
Just did that. Thanks for nitpicking :-)
Ralf
