Re: [PATCH] Avoid potential hazard on Context register

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Ralf Baechle wrote:

I'm curious, did you actually manage to trigger this one?  The time between
the instructions should be fairly long but then again the 34K has been
good for a few surprises!

Yes... It actually showed up in 74k silicon at particular clock frequencies. The dual issue pipeline does make it susceptible to these "theoretical" problems ;)

Chris

--
Chris Dearman               Desk: +1 408 530 5092  Cell: +1 650 224 8603
MIPS Technologies Inc            955 East Arques Ave, Sunnyvale CA 94085


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