This patch checks if the watchdog enable bit is set in the DCL
register meaning that the hardware watchdog actually works and
if so, register the ar7_wdt platform_device.
Signed-off-by: Florian Fainelli <florian@xxxxxxxxxxx>
---
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index e2278c0..835f3f0 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -503,6 +503,7 @@ static int __init ar7_register_devices(void)
{
u16 chip_id;
int res;
+ u32 *bootcr, val;
#ifdef CONFIG_SERIAL_8250
static struct uart_port uart_port[2];
@@ -595,7 +596,13 @@ static int __init ar7_register_devices(void)
ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
- res = platform_device_register(&ar7_wdt);
+ bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
+ val = *bootcr;
+ iounmap(bootcr);
+
+ /* Register watchdog only if enabled in hardware */
+ if (val & AR7_WDT_HW_ENA)
+ res = platform_device_register(&ar7_wdt);
return res;
}
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h
index de71694..21cbbc7 100644
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -78,6 +78,9 @@
#define AR7_REF_CLOCK 25000000
#define AR7_XTAL_CLOCK 24000000
+/* DCL */
+#define AR7_WDT_HW_ENA 0x10
+
struct plat_cpmac_data {
int reset_bit;
int power_bit;
