Re: [loongson-PATCH-v3 18/25] Add Siliconmotion 712 framebuffer driver

[Simon Braunschmidt <sb@xxxxxxxxx>]

wuzhangjin@xxxxxxxxx wrote:
> From: Wu Zhangjin <wuzj@xxxxxxxxxx>
>
> yeeloong(2f) laptop has a SMI video card, need this driver.
>
> this source code is originally from
> http://dev.lemote.com/code/linux_loongson
>
> tons of warnings have been fixed, the main warning is:
>
>       warning: left shift count >= width of type
>
> have been fixed via the following modification:
>
>       drivers/video/smi/smtc2d.h:
>
>       #define _F_MASK(f) ((((1 << _F_SIZE(f)) - 1) << _F_START(f))
>       #define _F_MASK(f) (((1ULL << _F_SIZE(f)) - 1) << _F_START(f))
>
> besides, the coding style is changed to follow the kernel style, and two
> non-used header files are removed: sm501hw.h, sm7xxhw.h.
>
> and there is no need to define a screen_info again so remove it, because
> it is defined in arch/mips/kernel/setup.c and not relative to big endian
> or little endian, and here I think its better use something like
> 1024x600x24 than 0x318, so replace all of the magic numbers to an
> understandable one.
>
> with the support of this patch, we can use the same kernel for 7inch and
> 8.9inch yeeloong laptop, but need pass a commandline argument for 7inch
> baord:
>
> vga=800x480x24
>
> Tested-by: Simon Braunschmidt <sbraun@xxxxxxxxx>
> Signed-off-by: Wu Zhangjin <wuzhangjin@xxxxxxxxx>
> Signed-off-by: Yan Hua <yanh@xxxxxxxxxx>
> ---

Hi Wu

I noticed that the framebuffer console is 
distored/non-readable/totally-unusable when choosing a mode with 24 or 
32 bit-per-pixel and CONFIG_FB_SM7XX_ACCEL

With 16 bpp or not choosing accelerated drawing, everything is fine.

Can you please test with your setup e.g. with
CONFIG_FB_SM7XX_ACCEL set and a high-bpp mode like
vga=1024x768x24






I still have some problems with mode setting, as i understand it:

1.
sm712vga_setup() is registered to parse the desired
vga= mode, when a valid string from vesa_mode[] is found, screen_info is 
initialized accordingly

2.
smtcfb_init() checks for initialized screen_info and eighter uses that 
mode or hardcoded default, transfers the mode to sfb->fb.var and calls

3.
smtcfb_setmode(sfb), which calls
smtc_set_timing(sfb, &hw), which is a wrapper to
sm712_set_timing(sfb, ppar_info)

4.
sm712_set_timing() will check if the desired mode can be found in
table VGAMode[], and if so will program the graphics engine with the
values from VGAMode[]

in table VGAMode[], only a certain set of modes is defined:
640x480x 16,24,32
800x600x 16,24,32
1024x600x16
1024x768x 24,32
320x240x 16,32

yet when the desired mode is not found in VGAMode[], still the
the following code is executed from in sm712_set_timing()

for ("iterate over VGAMode[]") {
  if ("found mode in VGAMode[]") {
	"set mode"
  }

+	smtc_mmiowb(0x67, 0x3c2);
+
+	/* set VPR registers */
+	writel(0x0, ppar_info->m_pVPR + 0x0C);
+	writel(0x0, ppar_info->m_pVPR + 0x40);
+
+	/* set data width */
+	m_nScreenStride =
+		(ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
+	switch (sfb->fb.var.bits_per_pixel) {
+	case 8:
+		writel(0x0, ppar_info->m_pVPR + 0x0);
+		break;
+	case 16:
+		writel(0x00020000, ppar_info->m_pVPR + 0x0);
+		break;
+	case 24:
+		writel(0x00040000, ppar_info->m_pVPR + 0x0);
+		break;
+	case 32:
+		writel(0x00030000, ppar_info->m_pVPR + 0x0);
+		break;
+	}
+	writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
+	       ppar_info->m_pVPR + 0x10);

} /* for ("iterate over VGAMode[]") */


..., what I do not understand is how you setup a mode like

vga=800x480x24

which is not defined in VGAMode[]. Doesnt the modesetting then simply 
break, silently?

BTW, the datasheet for this chip is available, search for
"LynxEM+ DataBook"
I think the missing mode values can be figured out from it, if someone 
takes the time...


Am I missing something here? I have commented the relevant code, 
following beneath

Best regards
Simon












the modes that can be set with vga=
> +struct vesa_mode_table {
> +	char mode_index[15];
> +	u16 lfb_width;
> +	u16 lfb_height;
> +	u16 lfb_depth;
> +};
> +
> +static struct vesa_mode_table vesa_mode[] = {
> +	{"640x480x8", 640, 480, 8},
> +	{"800x480x8", 800, 480, 8},
> +	{"800x600x8", 800, 600, 8},
> +	{"1024x768x8", 1024, 768, 8},
> +	{"1280x1024x8", 1280, 1024, 8},
> +
> +	{"640x480x16", 640, 480, 16},
> +	{"800x480x16", 800, 480, 16},
> +	{"800x600x16", 800, 600, 16},
> +	{"1024x768x16", 1024, 768, 16},
> +	{"1280x1024x16", 1280, 1024, 16},
> +
> +	{"640x480x24", 640, 480, 24},
> +	{"800x480x24", 800, 480, 24},
> +	{"800x600x24", 800, 600, 24},
> +	{"1024x768x24", 1024, 768, 24},
> +	{"1280x1024x24", 1280, 1024, 24},
> +};



mode setting
> +static void sm712_set_timing(struct smtcfb_info *sfb,
> +			     struct par_info *ppar_info)
> +{
> +	int i = 0, j = 0;
> +	u32 m_nScreenStride;
> +
> +	smdbg("\nppar_info->width = %d ppar_info->height = %d"
> +			"sfb->fb.var.bits_per_pixel = %d ppar_info->hz = %d\n",
> +			ppar_info->width, ppar_info->height,
> +			sfb->fb.var.bits_per_pixel, ppar_info->hz);
> +
> +	for (j = 0; j < numVGAModes; j++) {
> +		if (VGAMode[j].mmSizeX == ppar_info->width &&
> +		    VGAMode[j].mmSizeY == ppar_info->height &&
> +		    VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
> +		    VGAMode[j].hz == ppar_info->hz) {
> +
> +			smdbg("\nVGAMode[j].mmSizeX  = %d VGAMode[j].mmSizeY ="
> +					"%d VGAMode[j].bpp = %d"
> +					"VGAMode[j].hz=%d\n",
> +					VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
> +					VGAMode[j].bpp, VGAMode[j].hz);
> +
> +			smdbg("VGAMode index=%d\n", j);
> +
> +			smtc_mmiowb(0x0, 0x3c6);
> +
> +			smtc_seqw(0, 0x1);
> +
> +			smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
> +
> +			/* init SEQ register SR00 - SR04 */
> +			for (i = 0; i < SIZE_SR00_SR04; i++)
> +				smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
> +
> +			/* init SEQ register SR10 - SR24 */
> +			for (i = 0; i < SIZE_SR10_SR24; i++)
> +				smtc_seqw(i + 0x10,
> +					  VGAMode[j].Init_SR10_SR24[i]);
> +
> +			/* init SEQ register SR30 - SR75 */
> +			for (i = 0; i < SIZE_SR30_SR75; i++)
> +				if (((i + 0x30) != 0x62) \
> +					&& ((i + 0x30) != 0x6a) \
> +					&& ((i + 0x30) != 0x6b))
> +					smtc_seqw(i + 0x30,
> +						VGAMode[j].Init_SR30_SR75[i]);
> +
> +			/* init SEQ register SR80 - SR93 */
> +			for (i = 0; i < SIZE_SR80_SR93; i++)
> +				smtc_seqw(i + 0x80,
> +					  VGAMode[j].Init_SR80_SR93[i]);
> +
> +			/* init SEQ register SRA0 - SRAF */
> +			for (i = 0; i < SIZE_SRA0_SRAF; i++)
> +				smtc_seqw(i + 0xa0,
> +					  VGAMode[j].Init_SRA0_SRAF[i]);
> +
> +			/* init Graphic register GR00 - GR08 */
> +			for (i = 0; i < SIZE_GR00_GR08; i++)
> +				smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
> +
> +			/* init Attribute register AR00 - AR14 */
> +			for (i = 0; i < SIZE_AR00_AR14; i++)
> +				smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
> +
> +			/* init CRTC register CR00 - CR18 */
> +			for (i = 0; i < SIZE_CR00_CR18; i++)
> +				smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
> +
> +			/* init CRTC register CR30 - CR4D */
> +			for (i = 0; i < SIZE_CR30_CR4D; i++)
> +				smtc_crtcw(i + 0x30,
> +					   VGAMode[j].Init_CR30_CR4D[i]);
> +
> +			/* init CRTC register CR90 - CRA7 */
> +			for (i = 0; i < SIZE_CR90_CRA7; i++)
> +				smtc_crtcw(i + 0x90,
> +					   VGAMode[j].Init_CR90_CRA7[i]);
> +		}
> +	}
> +	smtc_mmiowb(0x67, 0x3c2);
> +
> +	/* set VPR registers */
> +	writel(0x0, ppar_info->m_pVPR + 0x0C);
> +	writel(0x0, ppar_info->m_pVPR + 0x40);
> +
> +	/* set data width */
> +	m_nScreenStride =
> +		(ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
> +	switch (sfb->fb.var.bits_per_pixel) {
> +	case 8:
> +		writel(0x0, ppar_info->m_pVPR + 0x0);
> +		break;
> +	case 16:
> +		writel(0x00020000, ppar_info->m_pVPR + 0x0);
> +		break;
> +	case 24:
> +		writel(0x00040000, ppar_info->m_pVPR + 0x0);
> +		break;
> +	case 32:
> +		writel(0x00030000, ppar_info->m_pVPR + 0x0);
> +		break;
> +	}
> +	writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
> +	       ppar_info->m_pVPR + 0x10);
> +
> +}

wrapper for modesetting
> +
> +static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info
> +		*ppar_info)
> +{
> +	switch (ppar_info->chipID) {
> +	case 0x710:
> +	case 0x712:
> +	case 0x720:
> +		sm712_set_timing(sfb, ppar_info);
> +		break;
> +	}
> +}


mode setting is called from here
> +
> +static int __init smtcfb_init(void)
> +{
> +	struct smtcfb_info *sfb;
> +	u_long smem_size = 0x00800000;	/* default 8MB */
> +	char name[16];
> +	int err, i = 0;
> +	unsigned long pFramebufferPhysical;
> +	struct pci_dev *pdev = NULL;
> +
> +	printk(KERN_INFO
> +		"Silicon Motion display driver " SMTC_LINUX_FB_VERSION "\n");
> +
> +	/* init the global variable */
> +	smtc_2Dacceleration = 0;	/* default no 2D acceleration */
> +
> +	do {
> +		pdev = pci_get_device(0x126f, smtc_ChipIDs[i], pdev);
> +		if (pdev == NULL) {
> +			i++;
> +		} else {
> +			hw.chipID = smtc_ChipIDs[i];
> +			break;
> +		}
> +	} while (i < numSMTCchipIDs);
> +
> +	err = pci_enable_device(pdev);	/* enable SMTC chip */
> +
> +	if (err)
> +		return err;
> +
> +	err = -ENOMEM;
> +
> +	sprintf(name, "sm%Xfb", hw.chipID);
> +
> +	sfb = smtc_alloc_fb_info(pdev, name);
> +
> +	if (!sfb)
> +		goto failed;
> +
> +	sm7xx_init_hw();
> +
> +	/*get mode parameter from screen_info */
> +	if (screen_info.lfb_width != 0) {
> +		sfb->fb.var.xres = screen_info.lfb_width;
> +		sfb->fb.var.yres = screen_info.lfb_height;
> +		sfb->fb.var.bits_per_pixel = screen_info.lfb_depth;
> +	} else {
> +		/* default resolution 1024x600 16bit mode */
> +		sfb->fb.var.xres = SCREEN_X_RES;
> +		sfb->fb.var.yres = SCREEN_Y_RES;
> +		sfb->fb.var.bits_per_pixel = SCREEN_BPP;
> +	}

use eighter the values derived from vga= or the hardcoded defaults

> +
> +	smdbg("\nsfb->fb.var.bits_per_pixel = %d sm712be_flag = %d\n",
> +	      sfb->fb.var.bits_per_pixel, sm712be_flag);
> +#ifdef __BIG_ENDIAN
> +	if (sm712be_flag == 1 && sfb->fb.var.bits_per_pixel == 24)
> +		sfb->fb.var.bits_per_pixel = (screen_info.lfb_depth = 32);
> +#endif
> +	/* Map address and memory detection */
> +	pFramebufferPhysical = pci_resource_start(pdev, 0);
> +	pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
> +
> +	switch (hw.chipID) {
> +	case 0x710:
> +	case 0x712:
> +		sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
> +		sfb->fb.fix.mmio_len = 0x00400000;
> +		smem_size = SM712_VIDEOMEMORYSIZE;
> +#ifdef __BIG_ENDIAN
> +		hw.m_pLFB = (smtc_VRAMBaseAddress =
> +		    ioremap(pFramebufferPhysical, 0x00c00000));
> +#else
> +		hw.m_pLFB = (smtc_VRAMBaseAddress =
> +		    ioremap(pFramebufferPhysical, 0x00800000));
> +#endif
> +		hw.m_pMMIO = (smtc_RegBaseAddress =
> +		    smtc_VRAMBaseAddress + 0x00700000);
> +		smtc_2DBaseAddress = (hw.m_pDPR =
> +		    smtc_VRAMBaseAddress + 0x00408000);
> +		smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712;
> +		hw.m_pVPR = hw.m_pLFB + 0x0040c000;
> +		if (sfb->fb.var.bits_per_pixel == 32) {
> +#ifdef __BIG_ENDIAN
> +			smtc_VRAMBaseAddress += 0x800000;
> +			hw.m_pLFB += 0x800000;
> +			printk(KERN_INFO
> +				"\nsmtc_VRAMBaseAddress=0x%X hw.m_pLFB=0x%X\n",
> +					smtc_VRAMBaseAddress, hw.m_pLFB);
> +#endif
> +		}
> +		if (!smtc_RegBaseAddress) {
> +
> +			printk(KERN_INFO
> +				"%s: unable to map memory mapped IO\n",
> +				sfb->fb.fix.id);
> +
> +			return -ENOMEM;
> +		}
> +
> +		/* set MCLK = 14.31818 * (0x16 / 0x2) */
> +		smtc_seqw(0x6a, 0x16);
> +		smtc_seqw(0x6b, 0x02);
> +		smtc_seqw(0x62, 0x3e);
> +		/* enable PCI burst */
> +		smtc_seqw(0x17, 0x20);
> +		/* enabel word swap */
> +		if (sfb->fb.var.bits_per_pixel == 32) {
> +#ifdef __BIG_ENDIAN
> +			smtc_seqw(0x17, 0x30);
> +#endif
> +		}
> +#ifdef CONFIG_FB_SM7XX_ACCEL
> +		smtc_2Dacceleration = 1;
> +#endif
> +
> +		break;
> +
> +	case 0x720:
> +		sfb->fb.fix.mmio_start = pFramebufferPhysical;
> +		sfb->fb.fix.mmio_len = 0x00200000;
> +		smem_size = SM722_VIDEOMEMORYSIZE;
> +		smtc_2DBaseAddress = (hw.m_pDPR =
> +		    ioremap(pFramebufferPhysical, 0x00a00000));
> +		hw.m_pLFB = (smtc_VRAMBaseAddress =
> +		    smtc_2DBaseAddress + 0x00200000);
> +		hw.m_pMMIO = (smtc_RegBaseAddress =
> +		    smtc_2DBaseAddress + 0x000c0000);
> +		smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722;
> +		hw.m_pVPR = smtc_2DBaseAddress + 0x800;
> +
> +		smtc_seqw(0x62, 0xff);
> +		smtc_seqw(0x6a, 0x0d);
> +		smtc_seqw(0x6b, 0x02);
> +		smtc_2Dacceleration = 0;
> +		break;
> +	default:
> +		printk(KERN_INFO
> +		"No valid Silicon Motion display chip was detected!\n");
> +
> +		smtc_free_fb_info(sfb);
> +		return err;
> +	}
> +
> +	/* can support 32 bpp */
> +	if (15 == sfb->fb.var.bits_per_pixel)
> +		sfb->fb.var.bits_per_pixel = 16;
> +
> +	sfb->fb.var.xres_virtual = sfb->fb.var.xres;
> +
> +	sfb->fb.var.yres_virtual = sfb->fb.var.yres;
> +	err = smtc_map_smem(sfb, pdev, smem_size);
> +	if (err)
> +		goto failed;
> +
> +	smtcfb_setmode(sfb);

Mode setting happens here as I understand it

> +	/* Primary display starting from 0 postion */
> +	hw.BaseAddressInVRAM = 0;
> +	sfb->fb.par = &hw;
> +
> +	err = register_framebuffer(&sfb->fb);
> +	if (err < 0)
> +		goto failed;
> +
> +	printk(KERN_INFO "Silicon Motion SM%X Rev%X primary display mode"
> +			"%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
> +			sfb->fb.var.xres, sfb->fb.var.yres,
> +			sfb->fb.var.bits_per_pixel);
> +
> +#if defined(CONFIG_FB_SM7XX_DUALHEAD)
> +	smtc_head2_init(sfb);
> +	err = register_framebuffer(&smtcfb_info2.fb);
> +
> +	/* if second head display fails, also fails the primary display */
> +	if (err < 0) {
> +		printk(KERN_INFO
> +			"Silicon Motion, Inc.  second head init fail\n");
> +		goto failed;
> +	}
> +
> +	printk(KERN_INFO "Silicon Motion SM%X Rev%X secondary display mode"
> +			"%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
> +			hw2.width, hw2.height,
> +			smtcfb_info2.fb.var.bits_per_pixel);
> +#endif
> +
> +	return 0;
> +
> + failed:
> +	printk(KERN_INFO "Silicon Motion, Inc.  primary display init fail\n");
> +
> +	smtc_unmap_smem(sfb);
> +	smtc_unmap_mmio(sfb);
> +	smtc_free_fb_info(sfb);
> +
> +	return err;
> +}






mode setting table

> +struct ModeInit {
> +	int mmSizeX;
> +	int mmSizeY;
> +	int bpp;
> +	int hz;
> +	unsigned char Init_MISC;
> +	unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
> +	unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
> +	unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
> +	unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
> +	unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
> +	unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
> +	unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
> +	unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
> +	unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
> +	unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
> +};
> +
> +/**********************************************************************
> +			 SM712 Mode table.
> + **********************************************************************/
> +struct ModeInit VGAMode[] = {
> +	{
> +	 /*  mode#0: 640 x 480  16Bpp  60Hz */
> +	 640, 480, 16, 60,
> +	 /*  Init_MISC */
> +	 0xE3,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x00, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
> +	  0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
> +	  0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
> +	  0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
> +	  0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
> +	  0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
> +	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
> +	  0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
> +	  0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
> +	  0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
> +	  0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
> +	  },
> +	 },
> +	{
> +	 /*  mode#1: 640 x 480  24Bpp  60Hz */
> +	 640, 480, 24, 60,
> +	 /*  Init_MISC */
> +	 0xE3,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x00, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
> +	  0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
> +	  0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
> +	  0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
> +	  0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
> +	  0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
> +	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
> +	  0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
> +	  0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
> +	  0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
> +	  0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
> +	  },
> +	 },
> +	{
> +	 /*  mode#0: 640 x 480  32Bpp  60Hz */
> +	 640, 480, 32, 60,
> +	 /*  Init_MISC */
> +	 0xE3,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x00, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
> +	  0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
> +	  0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
> +	  0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
> +	  0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
> +	  0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
> +	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
> +	  0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
> +	  0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
> +	  0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
> +	  0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
> +	  },
> +	 },
> +
> +	{			/*  mode#2: 800 x 600  16Bpp  60Hz */
> +	 800, 600, 16, 60,
> +	 /*  Init_MISC */
> +	 0x2B,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
> +	  0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
> +	  0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
> +	  0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
> +	  0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
> +	  0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
> +	  0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
> +	  0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
> +	  0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
> +	  0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
> +	  0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
> +	  },
> +	 },
> +	{			/*  mode#3: 800 x 600  24Bpp  60Hz */
> +	 800, 600, 24, 60,
> +	 0x2B,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
> +	  0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
> +	  0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
> +	  0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
> +	  0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
> +	  0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
> +	  0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
> +	  0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
> +	  0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
> +	  0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
> +	  },
> +	 },
> +	{			/*  mode#7: 800 x 600  32Bpp  60Hz */
> +	 800, 600, 32, 60,
> +	 /*  Init_MISC */
> +	 0x2B,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
> +	  0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
> +	  0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
> +	  0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
> +	  0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
> +	  0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
> +	  0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
> +	  0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
> +	  0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
> +	  0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
> +	  0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
> +	  },
> +	 },
> +	/* We use 1024x768 table to light 1024x600 panel for lemote */
> +	{			/*  mode#4: 1024 x 600  16Bpp  60Hz  */
> +	 1024, 600, 16, 60,
> +	 /*  Init_MISC */
> +	 0xEB,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x00, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
> +	  0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x00, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
> +	  0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
> +	  0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
> +	  0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
> +	  0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
> +	  0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
> +	  0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
> +	  0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
> +	  0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
> +	  0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
> +	  0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
> +	  },
> +	 },
> +	{			/*  mode#5: 1024 x 768  24Bpp  60Hz */
> +	 1024, 768, 24, 60,
> +	 /*  Init_MISC */
> +	 0xEB,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x30, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
> +	  0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
> +	  0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
> +	  0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
> +	  0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
> +	  0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
> +	  0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
> +	  0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
> +	  0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
> +	  0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
> +	  },
> +	 },
> +	{			/*  mode#4: 1024 x 768  32Bpp  60Hz */
> +	 1024, 768, 32, 60,
> +	 /*  Init_MISC */
> +	 0xEB,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x32, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
> +	  0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
> +	  0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
> +	  0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
> +	  0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
> +	  0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
> +	  0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
> +	  0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
> +	  0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
> +	  0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
> +	  0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
> +	  },
> +	 },
> +	{			/*  mode#6: 320 x 240  16Bpp  60Hz */
> +	 320, 240, 16, 60,
> +	 /*  Init_MISC */
> +	 0xEB,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x32, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
> +	  0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
> +	  0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
> +	  0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
> +	  0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
> +	  0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
> +	  0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
> +	  0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
> +	  0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
> +	  0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
> +	  0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
> +	  },
> +	 },
> +
> +	{			/*  mode#8: 320 x 240  32Bpp  60Hz */
> +	 320, 240, 32, 60,
> +	 /*  Init_MISC */
> +	 0xEB,
> +	 {			/*  Init_SR0_SR4 */
> +	  0x03, 0x01, 0x0F, 0x03, 0x0E,
> +	  },
> +	 {			/*  Init_SR10_SR24 */
> +	  0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
> +	  0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0xC4, 0x32, 0x02, 0x01, 0x01,
> +	  },
> +	 {			/*  Init_SR30_SR75 */
> +	  0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
> +	  0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
> +	  0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
> +	  0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
> +	  0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
> +	  0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
> +	  0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
> +	  0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
> +	  0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
> +	  },
> +	 {			/*  Init_SR80_SR93 */
> +	  0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
> +	  0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
> +	  0x00, 0x00, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_SRA0_SRAF */
> +	  0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
> +	  0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
> +	  },
> +	 {			/*  Init_GR00_GR08 */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_AR00_AR14 */
> +	  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
> +	  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
> +	  0x41, 0x00, 0x0F, 0x00, 0x00,
> +	  },
> +	 {			/*  Init_CR00_CR18 */
> +	  0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
> +	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	  0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
> +	  0xFF,
> +	  },
> +	 {			/*  Init_CR30_CR4D */
> +	  0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
> +	  0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
> +	  0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
> +	  0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
> +	  },
> +	 {			/*  Init_CR90_CRA7 */
> +	  0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
> +	  0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
> +	  0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
> +	  },
> +	 },
> +};
> +
> +#define numVGAModes		(sizeof(VGAMode) / sizeof(struct ModeInit))