Enabling and Disabling Interrupts
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On cpus without the ei/di instructions, the macros local_irq_enable and
local_irq_disable use a read-modify-write of the status register to
change the IE bit. Doesn't this leave a window where an interrupting
context can change the status registers interrupt mask bits and have
that change reversed when the interrupted context resumes? Or possibly
this is covered by a policy I haven't figured out yet?
Thanks,
Chris Rhodin
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